/**
 ******************************************************************************
 * @file           : main.c
 * @author         : Auto-generated by STM32CubeIDE
 * @brief          : Main program body
 ******************************************************************************
 * @attention
 *
 * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
 * All rights reserved.</center></h2>
 *
 * This software component is licensed by ST under BSD 3-Clause license,
 * the "License"; You may not use this file except in compliance with the
 * License. You may obtain a copy of the License at:
 *                        opensource.org/licenses/BSD-3-Clause
 *
 ******************************************************************************
 */

#include "stm32l073xx.h"

#if !defined(__SOFT_FP__) && defined(__ARM_FP)
  #warning "FPU is not initialized, but the project is compiling for an FPU. Please initialize the FPU before use."
#endif

void nastavPll1()
{
	// zapne interni vysokorychlostni oscilator
	RCC->CR |= RCC_CR_HSION;

	// cekej, dokud HSI neni pripraveny
	while (!(RCC->CR & RCC_CR_HSIRDY));

	// nastavi napetovou uroven 1
	PWR->CR = (1 << PWR_CR_VOS_Pos);

	// zapne cekaci stav
	FLASH->ACR |= FLASH_ACR_LATENCY;

	// PLL nasobi 4x -> 64 MHz
	RCC->CFGR |= RCC_CFGR_PLLMUL4;

	// PLL deli 2x -> 32 MHz
	RCC->CFGR |= RCC_CFGR_PLLDIV2;

	// Zapne PLL
	RCC->CR |= RCC_CR_PLLON;

	// cekej, dokud neni PLL pripraven
	while ((RCC->CR & RCC_CR_PLLRDY) != RCC_CR_PLLRDY);

	// nastavi PLL jako zdroj hodinoveho signalu
	RCC->CFGR |= RCC_CFGR_SW_PLL;

	// cekej, dokud neni zdroj prepnuty
	while ((RCC->CFGR & RCC_CFGR_SWS_PLL) != RCC_CFGR_SWS_PLL);

	// vypne interni vicerychlostni oscilator
	RCC->CR &= ~RCC_CR_MSION;
}

void nastavPll()
{
	// zapne interni vysokorychlostni oscilator
	RCC->CR |= RCC_CR_HSION;

	// cekej, dokud HSI neni pripraveny
	while (!(RCC->CR & RCC_CR_HSIRDY));

	// vydeli HSI 4x -> 4 MHz
	RCC->CR |= RCC_CR_HSIDIVEN;

	// nastavi napetovou uroven 1
	PWR->CR = (1 << PWR_CR_VOS_Pos);

	// zapne cekaci stav
	FLASH->ACR |= FLASH_ACR_LATENCY;

	// PLL nasobi 16x -> 64 MHz
	RCC->CFGR |= RCC_CFGR_PLLMUL16;

	// PLL deli 2x -> 32 MHz
	RCC->CFGR |= RCC_CFGR_PLLDIV2;

	// Zapne PLL
	RCC->CR |= RCC_CR_PLLON;

	// cekej, dokud neni PLL pripraven
	while ((RCC->CR & RCC_CR_PLLRDY) != RCC_CR_PLLRDY);

	// nastavi PLL jako zdroj hodinoveho signalu
	RCC->CFGR |= RCC_CFGR_SW_PLL;

	// cekej, dokud neni zdroj prepnuty
	while ((RCC->CFGR & RCC_CFGR_SWS_PLL) != RCC_CFGR_SWS_PLL);

	// vypne interni vicerychlostni oscilator
	RCC->CR &= ~RCC_CR_MSION;
}

int main(void)
{
	nastavPll1();

	// zapne LSI
	RCC->CSR |= RCC_CSR_LSION;

	// nastavi delicku APB2 /16
	RCC->CFGR |= RCC_CFGR_PPRE2_DIV16;

	// nastavi zdroje hodinoveho signalu: LPTIM1 -> LSI
	// USART2 -> HSI; USART1 -> APB2 (vychozi); I2C -> HSI
	RCC->CCIPR |= (RCC_CCIPR_LPTIM1SEL_0 | RCC_CCIPR_USART2SEL_1 |
					RCC_CCIPR_I2C1SEL_1);

	// zapne SPI2, USART2, I2C1 a LPTIM1
	RCC->APB1ENR |= (RCC_APB1ENR_SPI2EN | RCC_APB1ENR_USART2EN |
					 RCC_APB1ENR_I2C1EN | RCC_APB1ENR_LPTIM1EN | RCC_APB1ENR_USART5EN);

	// zapne USART1 a ADC
	RCC->APB2ENR |= (RCC_APB2ENR_USART1EN | RCC_APB2ENR_ADCEN);

	while(1);
}




// zapne SPI2, USART4, USART5, I2C3 a TIM6
/*RCC->APB1ENR |= (RCC_APB1ENR_SPI2EN | RCC_APB1ENR_USART4EN |
				 RCC_APB1ENR_USART5EN | RCC_APB1ENR_I2C3EN |
				 RCC_APB1ENR_TIM6EN);

// zapne ADC
RCC->APB2ENR |= RCC_APB2ENR_ADCEN;*/
